118 search results - page 14 / 24 » Timing constraint specification and synthesis in behavioral ... |
EVOW
2001
Springer
15 years 2 months ago
2001
Springer
The integrated circuits design flow is rapidly moving towards higher description levels. However, test-related activities are lacking behind this trend, mainly since effective faul...
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CHARME
1995
Springer
15 years 1 months ago
1995
Springer
In this paper we present a method formodeling asynchronous digital circuits by timed automata. The constructed timed automata serve as \mechanical" and veri able objects for a...
ICCAD
1998
IEEE
15 years 1 months ago
1998
IEEE
Designers of distributed embedded systems face many challenges in determining the appropriate tradeoffs to make when defining a system architecture or retargeting an existing desi...
JAR
2000
14 years 9 months ago
2000
We study the runtime distributions of backtrack procedures for propositional satisfiability and constraint satisfaction. Such procedures often exhibit a large variability in perfor...
PLDI
2012
ACM
13 years 1 days ago
2012
ACM
Modern architectures implement relaxed memory models which may reorder memory operations or execute them non-atomically. Special instructions called memory fences are provided, al...