264 search results - page 13 / 53 » Timing driven power gating |
90
Voted
ASPDAC
2007
ACM
15 years 3 months ago
2007
ACM
Parallel prefix adder is the most flexible and widely-used binary adder for ASIC designs. Many high-level synthesis techniques have been developed to find optimal prefix structures...
ISPDC
2003
IEEE
15 years 5 months ago
2003
IEEE
— This paper presents a new power management technique integrated into a multithreaded microcontroller with builtin real-time scheduling schemes. Power management is done by hard...
113
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DAC
2008
ACM
15 years 1 months ago
2008
ACM
Clock skew scheduling has been traditionally considered as a tool for improving the clock period in a sequential circuit. Timing slack is "stolen" from fast combinationa...
114
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DATE
2010
IEEE
14 years 10 months ago
2010
IEEE
—Starting from sequential programs, we present an approach combining data reuse, multi-level MapReduce, and pipelining to automatically find the most power-efficient designs th...
EUC
2004
Springer
15 years 5 months ago
2004
Springer
We propose power-aware on-line task scheduling algorithms for mixed task sets which consist of both periodic and aperiodic tasks. The proposed algorithms utilize the execution beha...