93 search results - page 5 / 19 » Timing optimization of FPGA placements by logic replication |
ICNP
2003
IEEE
15 years 2 months ago
2003
IEEE
Emerging large scale distributed networking systems, such as P2P file sharing systems, sensor networks, and ad hoc wireless networks, require replication of content, functionalit...
186
Voted
ICDE
2009
IEEE
15 years 11 months ago
2009
IEEE
We present the architectural design and recent performance optimizations of a state of the art commercial database replication technology provided in Oracle Streams. The underlying...
FPGA
2006
ACM
15 years 1 months ago
2006
ACM
Abstract--Field-programmable gate-array (FPGA) logic synthesis and technology mapping have been studied extensively over the past 15 years. However, progress within the last few ye...
FCCM
2002
IEEE
15 years 2 months ago
2002
IEEE
C-slow retiming (changing a design to support multiple instances of a computation) and datapath-aware placement have long been advocated by members of the FPGA synthesis community...
FPGA
2005
ACM
15 years 3 months ago
2005
ACM
Creating a new FPGA is a challenging undertaking because of the significant effort that must be spent on circuit design, layout and verification. It currently takes approximately ...