93 search results - page 6 / 19 » Timing optimization of FPGA placements by logic replication |
ICDT
2005
ACM
15 years 3 months ago
2005
ACM
A common technique for improving performance for database query retrieval is to decluster the database among multiple disks so that retrievals can be parallelized. In this paper we...
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FPGA
2004
ACM
15 years 3 months ago
2004
ACM
We consider active leakage power dissipation in FPGAs and present a “no cost” approach for active leakage reduction. It is well-known that the leakage power consumed by a digi...
FCCM
2006
IEEE
15 years 3 months ago
2006
IEEE
This paper introduces the Low-Power Intelligent Tool Environment (LITE), an object oriented tool set designed for power visualization, analysis, and optimization. These tools lever...
ICCAD
1999
IEEE
15 years 1 months ago
1999
IEEE
: In this paper, an algorithm for simultaneous logic restructuring and placement is presented. This algorithm first constructs a set of super-cells along the critical paths and the...
GLVLSI
2006
IEEE
15 years 3 months ago
2006
IEEE
This paper presents a minimum area, low-power driven clustering algorithm for coarse-grained, antifuse-based FPGAs under delay constraints. The algorithm accurately predicts logic...