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» Timing-driven optimization using lookahead logic circuits
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TCAD
2008
97views more  TCAD 2008»
14 years 9 months ago
Encoding Large Asynchronous Controllers With ILP Techniques
State encoding is one of the most difficult problems in the synthesis of asynchronous controllers. This paper presents a method that can solve the problem of large controllers spec...
Josep Carmona, Jordi Cortadella
65
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DDECS
2007
IEEE
143views Hardware» more  DDECS 2007»
15 years 3 months ago
An Experimental Analysis of SEU Sensitiveness on System Knowledge-based Hardening Techniques
Logic Soft Errors caused by radiation are a major concern when working with circuits that need to operate in harsh environments, such as space or avionics applications, where soft ...
Oscar Ruano, Pilar Reyes, Juan Antonio Maestro, Lu...
VLSID
2005
IEEE
120views VLSI» more  VLSID 2005»
15 years 3 months ago
On Finding Consecutive Test Vectors in a Random Sequence for Energy-Aware BIST Design
During pseudorandom testing, a significant amount of energy and test application time is wasted for generating and for applying “useless” test vectors that do not contribute t...
Sheng Zhang, Sharad C. Seth, Bhargab B. Bhattachar...
TCAD
2002
99views more  TCAD 2002»
14 years 9 months ago
Analysis of on-chip inductance effects for distributed RLC interconnects
This paper introduces an accurate analysis of on-chip inductance effects for distributed interconnects that takes the effect of both the series resistance and the output parasitic ...
Kaustav Banerjee, Amit Mehrotra
DAC
2009
ACM
15 years 10 months ago
Analysis and mitigation of process variation impacts on Power-Attack Tolerance
Embedded cryptosystems show increased vulnerabilities to implementation attacks such as power analysis. CMOS technology trends are causing increased process variations which impac...
Lang Lin, Wayne P. Burleson