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VLSID
2009
IEEE
142views VLSI» more  VLSID 2009»
15 years 10 months ago
Floorplanning for Partial Reconfiguration in FPGAs
Partial Reconfiguration on heterogeneous Field Programmable Gate Arrays (FPGA) with millions of gates yields better utilization of resources by swapping in and out the active modu...
Pritha Banerjee, Megha Sangtani, Susmita Sur-Kolay
ICCD
2006
IEEE
117views Hardware» more  ICCD 2006»
15 years 7 months ago
System-Level Energy Modeling for Heterogeneous Reconfigurable Chip Multiprocessors
—Field-Programmable Gate Array (FPGA) technology is characterized by continuous improvements that provide new opportunities in system design. Multiprocessors-ona-Programmable-Chi...
Xiaofang Wang, Sotirios G. Ziavras
IGARSS
2009
14 years 7 months ago
High Performance Computing for Hyperspectral Image Analysis: Perspective and State-of-the-art
The main purpose of this paper is to describe available (HPC)based implementations of remotely sensed hyperspectral image processing algorithms on multi-computer clusters, heterog...
Antonio Plaza, Qian Du, Yang-Lang Chang
88
Voted
FPGA
2001
ACM
137views FPGA» more  FPGA 2001»
15 years 2 months ago
A crosstalk-aware timing-driven router for FPGAs
As integrated circuits are migrated to more advanced technologies, it has become clear that crosstalk is an important physical phenomenon that must be taken into account. Crosstal...
Steven J. E. Wilton
FPL
1998
Springer
82views Hardware» more  FPL 1998»
15 years 2 months ago
Pebble: A Language for Parametrised and Reconfigurable Hardware Design
Abstract. Pebble is a simple language designed to improve the productivity and effectiveness of hardware design. It improves productivity by adopting reusable word-level and bit-le...
Wayne Luk, Steve McKeever