3 search results - page 1 / 1 » Tolerating Branch Predictor Latency on SMT |
ISHPC
2003
Springer
15 years 2 months ago
2003
Springer
Abstract. Simultaneous Multithreading (SMT) tolerates latency by executing instructions from multiple threads. If a thread is stalled, resources can be used by other threads. Howev...
CF
2010
ACM
15 years 2 months ago
2010
ACM
Branches that depend directly or indirectly on load instructions are a leading cause of mispredictions by state-of-the-art branch predictors. For a branch of this type, there is a...
PCI
2005
Springer
15 years 3 months ago
2005
Springer
Cache misses form a major bottleneck for memory-intensive applications, due to the significant latency of main memory accesses. Loop tiling, in conjunction with other program tran...