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» Tolerating Faults in Synchronization Networks
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DSN
2011
IEEE
14 years 1 months ago
Transparent dynamic binding with fault-tolerant cache coherence protocol for chip multiprocessors
—Aggressive technology scaling causes chip multiprocessors increasingly error-prone. Core-level faulttolerant approaches bind two cores to implement redundant execution and error...
Shuchang Shan, Yu Hu, Xiaowei Li
INFOCOM
2009
IEEE
15 years 8 months ago
MARA: Maximum Alternative Routing Algorithm
—In hop-by-hop networks, provision of multipath routes for all nodes can improve fault tolerance and performance. In this paper we study the multipath route calculation by constr...
Yasuhiro Ohara, Shinji Imahori, Rodney Van Meter
EUROPAR
2007
Springer
15 years 8 months ago
Asynchronous Distributed Power Iteration with Gossip-Based Normalization
The dominant eigenvector of matrices defined by weighted links in overlay networks plays an important role in many peer-to-peer applications. Examples include trust management, im...
Márk Jelasity, Geoffrey Canright, Kenth Eng...
ICAS
2005
IEEE
143views Robotics» more  ICAS 2005»
15 years 7 months ago
Approaches to P2P Internet Application Development
Research in overlay and P2P networking has been tightly focused on fundamentals in the last few years, leading to developments on a range of important issues. The time has come to...
Thabotharan Kathiravelu, Arnold Pears
GLVLSI
2009
IEEE
151views VLSI» more  GLVLSI 2009»
15 years 5 months ago
Reliability aware NoC router architecture using input channel buffer sharing
To address the increasing demand for reliability in on-chip networks, we proposed a novel Reliability Aware Virtual channel (RAVC) NoC router micro-architecture that enables both ...
Mohammad Hossein Neishaburi, Zeljko Zilic