48 search results - page 9 / 10 » Tolerating data access latency with register preloading |
117
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TVLSI
2010
14 years 4 months ago
2010
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
PC
2007
14 years 9 months ago
2007
The Sony–Toshiba–IBM Cell Broadband Engine (Cell/B.E.) is a heterogeneous multicore architecture that consists of a traditional microprocessor (PPE) with eight SIMD co-process...
EUROSYS
2011
ACM
14 years 1 months ago
2011
ACM
The increasing popularity of cloud storage services has lead companies that handle critical data to think about using these services for their storage needs. Medical record databa...
HPCA
2008
IEEE
15 years 10 months ago
2008
IEEE
The continued scaling of device dimensions and the operating voltage reduces the critical charge and thus natural noise tolerance level of transistors. As a result, circuits can p...
102
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COMPUTING
2004
14 years 9 months ago
2004
The presented image registration method uses a regularized gradient flow to correlate the intensities in two images. Thereby, an energy functional is successively minimized by des...