Sciweavers

300 search results - page 16 / 60
» Tools and Methodologies for Low Power Design
Sort
View
TVLSI
2010
14 years 4 months ago
LOPASS: A Low-Power Architectural Synthesis System for FPGAs With Interconnect Estimation and Optimization
In this paper, we present a low-power architectural synthesis system (LOPASS) for field-programmable gate-array (FPGA) designs with interconnect power estimation and optimization. ...
Deming Chen, Jason Cong, Yiping Fan, Lu Wan
SBCCI
2006
ACM
126views VLSI» more  SBCCI 2006»
15 years 3 months ago
Power constrained design optimization of analog circuits based on physical gm/ID characteristics
This paper presents a transistor optimization methodology for low-power analog integrated CMOS circuits, relying on the physics-based gm/ID characteristics as a design optimizatio...
Alessandro Girardi, Sergio Bampi
ISPD
1997
ACM
100views Hardware» more  ISPD 1997»
15 years 1 months ago
A pseudo-hierarchical methodology for high performance microprocessor design
- This paper reports on a highly effective methodology to construct complex high performance microprocessors. Critical aspects of the methodology include an integrated database for...
A. Bertolet, K. Carpenter, Keith M. Carrig, Albert...
ASPDAC
2001
ACM
185views Hardware» more  ASPDAC 2001»
15 years 1 months ago
Power optimization and management in embedded systems
Power-efficient design requires reducing power dissipation in all parts of the design and during all stages of the design process subject to constraints on the system performance ...
Massoud Pedram
DAC
2003
ACM
15 years 10 months ago
A low-energy chip-set for wireless intercom
A low power wireless intercom system is designed and implemented. Two fully-operational ASICs, integrating custom and commercial IP, implement the entire digital portion of the pr...
M. Josie Ammer, Michael Sheets, Tufan C. Karalar, ...