300 search results - page 23 / 60 » Tools and Methodologies for Low Power Design |
ICCAD
1999
IEEE
15 years 1 months ago
1999
IEEE
Design systems to provide various quality of service (QoS) guarantees has received a lot of attentions due to the increasing popularity of real-time multimedia and wireless commun...
ISQED
2006
IEEE
15 years 3 months ago
2006
IEEE
— With advanced VLSI manufacturing technology in deep submicron (DSM) regime, we can integrate entire electronic systems on a single chip (SoC). Due to the complexity in SoC desi...
72
Voted
ICCAD
2003
IEEE
15 years 6 months ago
2003
IEEE
— In this paper, we present a high-level power model to estimate the power consumption in semi-global and global interconnects. Such interconnects are used for communications bet...
65
Voted
DAC
2006
ACM
15 years 3 months ago
2006
ACM
A hierarchical power distribution methodology that enables more than dozen power domains in a chip and a power management scheme using 20 power domains are described. This method ...
93
Voted
DAC
1998
ACM
15 years 10 months ago
1998
ACM
Power consumption has become one of the biggest challenges in high-performance microprocessor design. The rapid increase in the complexity and speed of each new CPU generation is ...