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» Tools and Methodologies for Low Power Design
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ICSE
2007
IEEE-ACM
15 years 9 months ago
POLUS: A POwerful Live Updating System
This paper presents POLUS, a software maintenance tool capable of iteratively evolving running software into newer versions. POLUS's primary goal is to increase the dependabi...
Haibo Chen, Jie Yu, Rong Chen, Binyu Zang, Pen-Chu...
ISVLSI
2003
IEEE
138views VLSI» more  ISVLSI 2003»
15 years 2 months ago
Bouncing Threads: Merging a New Execution Model into a Nanotechnology Memory
The need for small, high speed, low power computers as the end of Moore’s law approaches is driving research into nanotechnology. These novel devices have significantly differe...
Sarah E. Frost, Arun Rodrigues, Charles A. Giefer,...
GECCO
2008
Springer
261views Optimization» more  GECCO 2008»
14 years 10 months ago
SSNNS -: a suite of tools to explore spiking neural networks
We are interested in engineering smart machines that enable backtracking of emergent behaviors. Our SSNNS simulator consists of hand-picked tools to explore spiking neural network...
Heike Sichtig, J. David Schaffer, Craig B. Laramee
EURODAC
1994
IEEE
133views VHDL» more  EURODAC 1994»
15 years 1 months ago
Mixed electrical-thermal and electrical-mechanical simulation of electromechatronic systems using PSpice
- The design methodology and technique is presented to expand the power of commercial SPICE to simulate mixed electricalthermal-mechanical microsystems, consisting of motors being ...
Konstantin O. Petrosjanc, Peter P. Maltcev
83
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DATE
2005
IEEE
134views Hardware» more  DATE 2005»
15 years 3 months ago
Assertion-Based Design Exploration of DVS in Network Processor Architectures
With the scaling of technology and higher requirements on performance and functionality, power dissipation is becoming one of the major design considerations in the development of...
Jia Yu, Wei Wu, Xi Chen, Harry Hsieh, Jun Yang 000...