Sciweavers

300 search results - page 41 / 60
» Tools and Methodologies for Low Power Design
Sort
View
ISLPED
2005
ACM
85views Hardware» more  ISLPED 2005»
15 years 3 months ago
A low-power crossroad switch architecture and its core placement for network-on-chip
As the number of cores on a chip increases, power consumed by the communication structures takes significant portion of the overall power-budget. The individual components of the...
Kuei-Chung Chang, Jih-Sheng Shen, Tien-Fu Chen
CASES
2006
ACM
15 years 3 months ago
Architecture and circuit techniques for low-throughput, energy-constrained systems across technology generations
Rising interest in the applications of wireless sensor networks has spurred research in the development of computing systems for lowthroughput, energy-constrained applications. Un...
Mark Hempstead, Gu-Yeon Wei, David Brooks
VLSID
2004
IEEE
170views VLSI» more  VLSID 2004»
15 years 10 months ago
On-chip networks: A scalable, communication-centric embedded system design paradigm
As chip complexity grows, design productivity boost is expected from reuse of large parts and blocks of previous designs with the design effort largely invested into the new parts...
Jörg Henkel, Srimat T. Chakradhar, Wayne Wolf
89
Voted
HICSS
2006
IEEE
117views Biometrics» more  HICSS 2006»
15 years 3 months ago
Project Establishment in the Context of Participatory Design: Experience from a Hospital Information System Development Project
This paper reports on a project establishment undertaking as proposed by the STEPS methodology (Software Technology for Evolutionary Participatory System Design). Project establis...
Salesio Mbogo Kiura
DAC
2000
ACM
15 years 10 months ago
GTX: the MARCO GSRC technology extrapolation system
Technology extrapolation -- the calibration and prediction of achievable design in future technology generations ? drives the evolution of VLSI system architectures, design method...
Andrew E. Caldwell, Yu Cao, Andrew B. Kahng, Farin...