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» Tools and Methodologies for Low Power Design
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ISSS
1997
IEEE
103views Hardware» more  ISSS 1997»
15 years 1 months ago
A Source-Level Dynamic Analysis Methodology and Tool for High-Level Synthesis
This paper presents a novel source-level dynamic analysis methodology and tool for High-Level Synthesis (HLS). It not only for the first time enables HLS to offer source-level de...
Chih-Tung Chen, Kayhan Küçük&cced...
IPPS
2006
IEEE
15 years 3 months ago
A high level SoC power estimation based on IP modeling
Current electronic system design requires to be concerned with power consumption consideration. However, in a lot of design tools, the application power consumption budget is esti...
David Elléouet, Nathalie Julien, Dominique ...
92
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ISCAS
1999
IEEE
87views Hardware» more  ISCAS 1999»
15 years 1 months ago
Instruction level power model of microcontrollers
In the design of low power systems, it is important to analyze and optimize both the hardware and the software component of the system. To evaluate the software component of the s...
C. Chakrabarti, D. Gaitonde
ISQED
2009
IEEE
106views Hardware» more  ISQED 2009»
15 years 4 months ago
Design and application of multimodal power gating structures
- Designing a power-gating structure with high performance in the active mode and low leakage and short wakeup time during standby mode is an important and challenging task. This p...
Ehsan Pakbaznia, Massoud Pedram
DAC
2004
ACM
15 years 10 months ago
Efficient power/ground network analysis for power integrity-driven design methodology
As technology advances, the metal width is decreasing with the length increasing, making the resistance along the power line increase substantially. Together with the nonlinear sc...
Su-Wei Wu, Yao-Wen Chang