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» Tools and Methodologies for Low Power Design
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PATMOS
2000
Springer
15 years 1 months ago
Dynamic Memory Design for Low Data-Retention Power
Abstract. The emergence of data-intensive applications in mobile environments has resulted in portable electronic systems with increasingly large dynamic memories. The typical oper...
Joohee Kim, Marios C. Papaefthymiou
ISLPED
1998
ACM
155views Hardware» more  ISLPED 1998»
15 years 1 months ago
Low threshold CMOS circuits with low standby current
Multi-Voltage CMOS MVCMOS is a design methodology for very low power supply voltages that uses low-threshold transistors in series with the supply rails. The control voltages on...
Mircea R. Stan
ASPDAC
2006
ACM
140views Hardware» more  ASPDAC 2006»
15 years 3 months ago
A cycle accurate power estimation tool
- Power consumption is one of the major challenges in VLSI Design. Power constrained designs need tools to accurately predict the power consumption and provide feedback to designer...
Rajat Chaudhry, Daniel L. Stasiak, Stephen D. Posl...
85
Voted
EUROGP
2001
Springer
124views Optimization» more  EUROGP 2001»
15 years 2 months ago
An Evolutionary Approach to Automatic Generation of VHDL Code for Low-Power Digital Filters
An evolutionary algorithm is used to design a finite impulse response digital filter with reduced power consumption. The proposed design approach combines genetic optimization an...
Massimiliano Erba, Roberto Rossi, Valentino Libera...
DAC
2000
ACM
15 years 10 months ago
Function-level power estimation methodology for microprocessors
We have developed a function-level power estimation methodology for predicting the power dissipation of embedded software. For a given microprocessor core, we empirically build th...
Gang Qu, Naoyuki Kawabe, Kimiyoshi Usami, Miodrag ...