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VLSID
2002
IEEE
152views VLSI» more  VLSID 2002»
16 years 5 months ago
Verification of an Industrial CC-NUMA Server
Directed test program-based verification or formal verification methods are usually quite ineffective on large cachecoherent, non-uniform memory access (CC-NUMA) multiprocessors b...
Rajarshi Mukherjee, Yozo Nakayama, Toshiya Mima
KBSE
2008
IEEE
15 years 11 months ago
Type-Checking Software Product Lines - A Formal Approach
—A software product line (SPL) is an efficient means to generate a family of program variants for a domain from a single code base. However, because of the potentially high numb...
Christian Kästner, Sven Apel
PDP
2003
IEEE
15 years 10 months ago
On Using ZENTURIO for Performance and Parameter Studies on Cluster and Grid Architectures
Over the last decade, a dramatic increase has been observed in the need for generating and organising data in the course of large parameter studies, performance analysis, and soft...
Radu Prodan, Thomas Fahringer, Michael Geissler, G...
VLSID
1998
IEEE
117views VLSI» more  VLSID 1998»
15 years 9 months ago
Partial Scan Selection Based on Dynamic Reachability and Observability Information
A partial scan selection strategy is proposed in which flip-flops are selected via newly proposed dynamic reachability and observability measures such that the remaining hard-to-d...
Michael S. Hsiao, Gurjeet S. Saund, Elizabeth M. R...
CONCUR
2006
Springer
15 years 8 months ago
Concurrent Rewriting for Graphs with Equivalences
Several applications of graph rewriting systems (notably, some encodings of calculi with name passing) require rules which, besides deleting and generating graph items, are able to...
Paolo Baldan, Fabio Gadducci, Ugo Montanari