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DSN
2005
IEEE
15 years 9 months ago
Checking Array Bound Violation Using Segmentation Hardware
The ability to check memory references against their associated array/buffer bounds helps programmers to detect programming errors involving address overruns early on and thus avo...
Lap-Chung Lam, Tzi-cker Chiueh
BMCBI
2007
98views more  BMCBI 2007»
15 years 4 months ago
Evaluation of 3D-Jury on CASP7 models
Background: 3D-Jury, the structure prediction consensus method publicly available in the Meta Server http://meta.bioinfo.pl/, was evaluated using models gathered in the 7th round ...
László Kaján, Leszek Rychlews...
ML
2010
ACM
151views Machine Learning» more  ML 2010»
15 years 2 months ago
Inductive transfer for learning Bayesian networks
In several domains it is common to have data from different, but closely related problems. For instance, in manufacturing, many products follow the same industrial process but with...
Roger Luis, Luis Enrique Sucar, Eduardo F. Morales
PROCEDIA
2011
14 years 7 months ago
10x10: A General-purpose Architectural Approach to Heterogeneity and Energy Efficiency
Two decades of microprocessor architecture driven by quantitative 90/10 optimization has delivered an extraordinary 1000-fold improvement in microprocessor performance, enabled by...
Andrew A. Chien, Allan Snavely, Mark Gahagan
SIPS
2006
IEEE
15 years 10 months ago
Automated Architectural Exploration for Signal Processing Algorithms
Abstract— This paper presents a design environment for efficiently generating application-specific Intellectual Property (IP) cores for system level signal processing algorithm...
Ramsey Hourani, Ravi Jenkal, W. Rhett Davis, Winse...