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ISCAS
1999
IEEE
106views Hardware» more  ISCAS 1999»
15 years 4 months ago
Test pattern generation for width compression in BIST
The main objectives of Built-In Self Test (BIST) are the design of test pattern generator circuits which achieve the highest fault coverage, require the shortest sequence of test ...
Paulo F. Flores, Horácio C. Neto, K. Chakra...
ICCAD
1997
IEEE
147views Hardware» more  ICCAD 1997»
15 years 4 months ago
Built-in test generation for synchronous sequential circuits
We consider the problem of built-in test generation for synchronous sequential circuits. The proposed scheme leaves the circuit flip-flops unmodified, and thus allows at-speed ...
Irith Pomeranz, Sudhakar M. Reddy
GECCO
2007
Springer
276views Optimization» more  GECCO 2007»
15 years 6 months ago
Automatic mutation test input data generation via ant colony
Fault-based testing is often advocated to overcome limitations of other testing approaches; however it is also recognized as being expensive. On the other hand, evolutionary algor...
Kamel Ayari, Salah Bouktif, Giuliano Antoniol
COMPSAC
2005
IEEE
15 years 6 months ago
Goal-Oriented Test Data Generation for Programs with Pointer Variables
Automatic test data generation leads to the identification of input values on which a selected path or a selected branch is executed within a program (path-oriented vs goalorient...
Arnaud Gotlieb, Tristan Denmat, Bernard Botella
112
Voted
DATE
2009
IEEE
94views Hardware» more  DATE 2009»
15 years 7 months ago
Improving compressed test pattern generation for multiple scan chain failure diagnosis
To reduce test data volumes, encoded tests and compacted test responses are widely used in industry. Use of test response compaction negatively impacts fault diagnosis since the e...
Xun Tang, Ruifeng Guo, Wu-Tung Cheng, Sudhakar M. ...