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MICRO
2009
IEEE
124views Hardware» more  MICRO 2009»
15 years 8 months ago
ZerehCache: armoring cache architectures in high defect density technologies
Aggressive technology scaling to 45nm and below introduces serious reliability challenges to the design of microprocessors. Large SRAM structures used for caches are particularly ...
Amin Ansari, Shantanu Gupta, Shuguang Feng, Scott ...
WADS
2009
Springer
232views Algorithms» more  WADS 2009»
15 years 8 months ago
On Making Directed Graphs Transitive
We present the first thorough theoretical analysis of the Transitivity Editing problem on digraphs. Herein, the task is to perform a minimum number of arc insertions or deletions ...
Mathias Weller, Christian Komusiewicz, Rolf Nieder...
CODES
2008
IEEE
15 years 8 months ago
Static analysis for fast and accurate design space exploration of caches
Application-specific system-on-chip platforms create the opportunity to customize the cache configuration for optimal performance with minimal chip estate. Simulation, in partic...
Yun Liang, Tulika Mitra
IISWC
2008
IEEE
15 years 8 months ago
Evaluating the impact of dynamic binary translation systems on hardware cache performance
Dynamic binary translation systems enable a wide range of applications such as program instrumentation, optimization, and security. DBTs use a software code cache to store previou...
Arkaitz Ruiz-Alvarez, Kim M. Hazelwood
INFOCOM
2008
IEEE
15 years 8 months ago
Stable Peers: Existence, Importance, and Application in Peer-to-Peer Live Video Streaming
—This paper presents a systematic in-depth study on the existence, importance, and application of stable nodes in peerto-peer live video streaming. Using traces from a real large...
Feng Wang, Jiangchuan Liu, Yongqiang Xiong