Sciweavers

336 search results - page 14 / 68
» Topology optimization of structured power ground networks
Sort
View
ICCD
2006
IEEE
183views Hardware» more  ICCD 2006»
15 years 8 months ago
An Active Decoupling Capacitance Circuit for Inductive Noise Suppression in Power Supply Networks
The placement of on-die decoupling capacitors (decap) between the power and ground supply grids has become a common practice in high performance processor designs. In this paper, ...
Sanjay Pant, David Blaauw
INFOCOM
2010
IEEE
14 years 9 months ago
Optimal Solutions for Single Fault Localization in Two Dimensional Lattice Networks
Abstract--Achieving fast, precise, and scalable fault localization has long been a highly desired feature in all-optical mesh networks. Monitoring tree (m-tree) is an interesting m...
János Tapolcai, Lajos Rónyai, Pin-Ha...
IPPS
2006
IEEE
15 years 5 months ago
Fault and intrusion tolerance of wireless sensor networks
The following three questions should be answered in developing new topology with more powerful ability to tolerate node-failure in wireless sensor network. First, what is node-fai...
Liang-min Wang, Jianfeng Ma, Chao Wang, A. C. Kot
110
Voted
BROADNETS
2006
IEEE
15 years 5 months ago
Design and Dimensioning of a Novel composite-star WDM Network with TDM Channel Partitioning
— This paper presents the design and dimensioning optimization of a novel optical network structure, called the Petaweb, having a total capacity of several Pb/s (1015 bit/s). Its...
Stefano Secci, Brunilde Sansò
HPCA
2009
IEEE
16 years 9 days ago
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
Reetuparna Das, Soumya Eachempati, Asit K. Mishra,...