26 search results - page 5 / 6 » Total Power Minimization in Glitch-Free CMOS Circuits Consid... |
TCAD
2008
14 years 9 months ago
2008
As CMOS technology is scaled down toward the nanoscale regime, drastically growing leakage currents and variations in device characteristics are becoming two important design chall...
76
Voted
ISQED
2008
IEEE
15 years 3 months ago
2008
IEEE
SRAM leakage power dominates the total power of low duty-cycle applications, e.g., sensor nodes. Accordingly, leakage power reduction during data-retention in SRAM standby is ofte...
TCAD
2008
14 years 9 months ago
2008
Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the mos...
105
Voted
PATMOS
2007
Springer
15 years 3 months ago
2007
Springer
—Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the...
TVLSI
2002
14 years 9 months ago
2002
Abstract--This paper provides a high level survey of the increasing effects of on-chip inductance. These effects are classified into desirable and nondesirable effects. Among the u...