Achieving design closure is one of the biggest headaches for modern VLSI designers. This problem is exacerbated by high-level design automation tools that ignore increasingly impo...
Zhenyu (Peter) Gu, Jia Wang, Robert P. Dick, Hai Z...
In this paper we propose a novel parameterized macromodeling technique for analog circuits. Unlike traditional macromodels that are only extracted for a small variation space, our...
In order to guarantee that real-time systems meet their timing specification, static execution time bounds need to be calculated. Not considering execution time predictability led...
Benedikt Huber, Wolfgang Puffitsch, Martin Schoebe...
— High level synthesis is one of the next major steps to improve the hw/sw co-design process. The advantages of high nthesis are two-fold. At first the level of abstraction is r...