Sciweavers

420 search results - page 66 / 84
» Towards Design Tools for Protocol Development
Sort
View
EVOW
2001
Springer
15 years 4 months ago
ARPIA: A High-Level Evolutionary Test Signal Generator
The integrated circuits design flow is rapidly moving towards higher description levels. However, test-related activities are lacking behind this trend, mainly since effective faul...
Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda...
MOBICOM
2005
ACM
15 years 5 months ago
GrooveSim: a topography-accurate simulator for geographic routing in vehicular networks
Vehicles equipped with wireless communication devices are poised to deliver vital services in the form of safety alerts, traffic congestion probing and on-road commercial applicat...
Rahul Mangharam, Daniel S. Weller, Daniel D. Stanc...
SIGCOMM
2004
ACM
15 years 5 months ago
Network sensitivity to hot-potato disruptions
Hot-potato routing is a mechanism employed when there are multiple (equally good) interdomain routes available for a given destination. In this scenario, the Border Gateway Protoc...
Renata Teixeira, Aman Shaikh, Timothy Griffin, Geo...
SDL
2003
147views Hardware» more  SDL 2003»
15 years 1 months ago
Modelling and Evaluation of a Network on Chip Architecture Using SDL
Network on Chip (NoC) is a new paradigm for designing large and complex systems on chips (SoCs). In this paradigm, a packet switched network is provided for on-chip communication. ...
Rickard Holsmark, Magnus Högberg, Shashi Kuma...
JETAI
2007
131views more  JETAI 2007»
14 years 11 months ago
A computational architecture for heterogeneous reasoning
Reasoning, problem solving, indeed the general process of acquiring knowledge, is not an isolated, homogenous affair involving a one agent using a single form of representation, b...
Dave Barker-Plummer, John Etchemendy