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» Towards a Flow Analysis for Embedded System C Programs
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RTAS
2008
IEEE
15 years 4 months ago
WCET Analysis for Multi-Core Processors with Shared L2 Instruction Caches
Multi-core chips have been increasingly adopted by microprocessor industry. For real-time systems to safely harness the potential of multi-core computing, designers must be able t...
Jun Yan, Wei Zhang
SIGSOFT
2007
ACM
15 years 10 months ago
Programming asynchronous layers with CLARITY
Asynchronous systems components are hard to write, hard to reason about, and (not coincidentally) hard to mechanically verify. In order to achieve high performance, asynchronous c...
Prakash Chandrasekaran, Christopher L. Conway, Jos...
EMSOFT
2008
Springer
14 years 11 months ago
Randomized directed testing (REDIRECT) for Simulink/Stateflow models
The Simulink/Stateflow (SL/SF) environment from Mathworks is becoming the de facto standard in industry for model based development of embedded control systems. Many commercial to...
Manoranjan Satpathy, Anand Yeolekar, S. Ramesh
SAC
2010
ACM
14 years 11 months ago
Reactive parallel processing for synchronous dataflow
The control flow of common processors does not match the specific needs of reactive systems. Key issues for these systems are preemption and concurrency, combined with timing pred...
Claus Traulsen, Reinhard von Hanxleden
CASES
2005
ACM
14 years 11 months ago
An Esterel processor with full preemption support and its worst case reaction time analysis
The concurrent synchronous language Esterel allows proto treat reactive systems in an abstract, concise manner. An Esterel program is typically first translated into other, non-s...
Xin Li, Jan Lukoschus, Marian Boldt, Michael Harde...