181 search results - page 21 / 37 » Towards a Philosophy of Instruction |
105
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APCSAC
2006
IEEE
15 years 8 months ago
2006
IEEE
Abstract. Bypass delays are expected to grow beyond 1ns as technology scales. These delays necessitate pipelining of bypass paths at processor frequencies above 1GHz and thus affe...
114
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IPPS
2005
IEEE
15 years 7 months ago
2005
IEEE
An architecture for a reconfigurable superscalar processor is described in which some of its execution units are implemented in reconfigurable hardware. The overall configuration ...
131
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ADAEUROPE
2010
Springer
15 years 6 months ago
2010
Springer
Now that multicore microprocessors have become a commodity, it is natural to think about employing them in all kinds of computing, including high-reliability embedded real-time sy...
113
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CHI
2007
ACM
16 years 2 months ago
2007
ACM
In this paper we discuss the problems faced when trying to design an evaluation protocol for a multimodal system using novel input modalities and in a new domain. In particular, w...
MHCI
2009
Springer
15 years 8 months ago
2009
Springer
We present the development and evaluation of an authoring system for image-based pedestrian navigation which lets authors take pictures and annotate instructions on the go in thre...