ion Himanshu Jain1,2 , Franjo Ivanˇci´c1 , Aarti Gupta1 , and Malay K. Ganai1 1 NEC Laboratories America, Inc., 4 Independence Way, Princeton, NJ 08540 2 School of Computer Scien...
Himanshu Jain, Franjo Ivancic, Aarti Gupta, Malay ...
While trace cache, value prediction, and prefetching have been shown to be effective in the single-threaded superscalar, there has been no analysis of these techniques in a Simulta...
Energy efficiency is rapidly becoming a first class optimization parameter for modern systems. Caches are critical to the overall performance and thus, modern processors (both hig...
Abstract - A multiprocessor system capable of exploiting fine-grained parallelism must support efficient synchronization and data passing mechanisms. This paper demonstrates the us...
Trace buffers are commonly used to capture data during in-system silicon debug. This paper exploits the fact that it is not necessary to capture error-free data in the trace buffe...