327 search results - page 28 / 66 » Trace register allocation |
CF
2008
ACM
15 years 29 days ago
2008
ACM
We develop architectural techniques for mitigating the impact of process variability. Our techniques hide the performance effects of slow components--including registers, function...
ISCAS
2003
IEEE
15 years 4 months ago
2003
IEEE
Improving testability during the early stages of High-Level Synthesis (HLS) has several benefits, including reduced test hardware overhead, reduced test costs, reduced design iter...
IWMM
2000
Springer
15 years 2 months ago
2000
Springer
The performance of automatic memory management may be improved if the policies used in allocating and collecting objects had knowledge of the lifetimes of objects. To date, approa...
ISCAS
1993
IEEE
15 years 3 months ago
1993
IEEE
The management of the surviving path memory in Viterbi's algorithm is generally performed by Trace-Back or Exchange.Register. A generalized method using precompiled trace-back...
IPPS
2006
IEEE
15 years 5 months ago
2006
IEEE
In this paper, we present a dynamically reconfigurable cache architecture using adaptive block allocation policy analyzed by means of simulation. Our main objectives are: to propo...