327 search results - page 29 / 66 » Trace register allocation |
CG
2008
Springer
14 years 11 months ago
2008
Springer
Recent developments have produced several techniques for interactive ray tracing of dynamic scenes. In particular, bounding volume hierarchies (BVHs) are efficient acceleration st...
116
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IMC
2010
ACM
14 years 9 months ago
2010
ACM
3G cellular data networks have recently witnessed explosive growth. In this work, we focus on UMTS, one of the most popular 3G mobile communication technologies. Our work is the f...
121
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IEEEPACT
2002
IEEE
15 years 3 months ago
2002
IEEE
Many modern embedded processors (esp. DSPs) support partitioned memory banks (also called X-Y memory or dual bank memory) along with parallel load/store instructions to achieve co...
136
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CODES
2004
IEEE
15 years 2 months ago
2004
IEEE
The memory subsystem accounts for a significant portion of the aggregate energy budget of contemporary embedded systems. Moreover, there exists a large potential for optimizing th...
ISSS
1997
IEEE
15 years 3 months ago
1997
IEEE
This paper presents a model for simultaneous instruction selection, compaction, and register allocation. An arc mapping model along with logical propositions is used to create an ...