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ISSS
1995
IEEE
100views Hardware» more  ISSS 1995»
15 years 2 months ago
Optimal code generation for embedded memory non-homogeneous register architectures
This paper examines the problem of code-generation for expression trees on non-homogeneous register set architectures. It proposes and proves the optimality of an O(n) algorithm f...
Guido Araujo, Sharad Malik
WCE
2007
14 years 12 months ago
A Graph-based Framework for High-level Test Synthesis
Improving testability during the early stages of High-level synthesis has several advantages including reduced test hardware overhead and design iterations. Recently, BIST techniq...
Ali Pourghaffari bashari, Saadat Pourmozafari
86
Voted
APLAS
2006
ACM
15 years 2 months ago
Combining Offline and Online Optimizations: Register Allocation and Method Inlining
Abstract. Fast dynamic compilers trade code quality for short compilation time in order to balance application performance and startup time. This paper investigates the interplay o...
Hiroshi Yamauchi, Jan Vitek
PLDI
2004
ACM
15 years 4 months ago
Balancing register allocation across threads for a multithreaded network processor
+ Modern network processors employ multi-threading to allow concurrency amongst multiple packet processing tasks. We studied the properties of applications running on the network p...
Xiaotong Zhuang, Santosh Pande
PLDI
1998
ACM
15 years 3 months ago
Quality and Speed in Linear-scan Register Allocation
A linear-scan algorithm directs the global allocation of register candidates to registers based on a simple linear sweep over the program being compiled. This approach to register...
Omri Traub, Glenn H. Holloway, Michael D. Smith