42 search results - page 5 / 9 » Trace-Driven Simulation of Decoupled Architectures |
140
Voted
ISCA
2006
IEEE
15 years 8 days ago
2006
IEEE
Packet-based on-chip networks are increasingly being adopted in complex System-on-Chip (SoC) designs supporting numerous homogeneous and heterogeneous functional blocks. These Net...
104
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ISCA
1999
IEEE
15 years 4 months ago
1999
IEEE
In the pursuit of instruction-level parallelism, significant demands are placed on a processor's instruction delivery mechanism. Delivering the performance necessary to meet ...
122
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MSWIM
2009
ACM
15 years 7 months ago
2009
ACM
Host Identity Protocol (HIP) decouples IP addresses from higher layer Internet applications by proposing a new, cryptographic namespace for host identities. HIP has great potentia...
130
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DAC
1997
ACM
15 years 4 months ago
1997
ACM
This paper describes a new design methodology to analyze the on-chip power supply noise for high performance microprocessors. Based on an integrated package-level and chip-level p...
100
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ASPDAC
2005
ACM
15 years 2 months ago
2005
ACM
— On current superscalar processors, performance and power issues cannot be decoupled for designers. Extensive simulations are usually required to meet both power and performance...