211 search results - page 5 / 43 » Tracing an Optical Buffer's Performance: An Effective Approa... |
DAC
2006
ACM
15 years 10 months ago
2006
ACM
As a prevalent constraint, sharp slew rate is often required in circuit design which causes a huge demand for buffering resources. This problem requires ultra-fast buffering techn...
ASPDAC
2007
ACM
15 years 1 months ago
2007
ACM
In today's designs, when functional verification fails, engineers perform debugging using the provided error traces. Reducing the length of error traces can help the debugging...
67
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WSC
2001
14 years 11 months ago
2001
To enhance the widespread use of a parallel supply chain simulator, a web front-end that enables access at any time and from any location has been developed. The front-end provide...
105
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ICSE
2012
IEEE-ACM
12 years 12 months ago
2012
IEEE-ACM
—Given limited resource and time before software release, development-site testing and debugging become more and more insufficient to ensure satisfactory software performance. As...
ISQED
2002
IEEE
15 years 2 months ago
2002
IEEE
As the process technology advances into the deep submicron era, interconnect plays a dominant role in determining circuit performance. Buffer insertion/sizing and wire sizing are ...