211 search results - page 8 / 43 » Tracing an Optical Buffer's Performance: An Effective Approa... |
HPCA
2003
IEEE
16 years 6 hour ago
2003
IEEE
Thread-level speculation provides architectural support to aggressively run hard-to-analyze code in parallel. As speculative tasks run concurrently, they generate unsafe or specul...
VLSID
2001
IEEE
16 years 14 hour ago
2001
IEEE
Abstract - An adaptive approach for dynamic voltage scheduling on processors is presented based on workload prediction by filtering a trace history. The effects of update frequency...
102
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HCI
2011
14 years 3 months ago
2011
Validation is critically important when human performance models are used to predict the effect of future system designs on human performance. A model of flight deck operations was...
IEEEPACT
2005
IEEE
15 years 5 months ago
2005
IEEE
This paper presents a new technique for efficient usage of small trace caches. A trace cache can significantly increase the performance of wide out-oforder processors, but to be e...
114
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ICDCS
2007
IEEE
15 years 6 months ago
2007
IEEE
State-of-the-art networked storage servers are equipped with increasingly powerful computing capability and large DRAM memory as storage caches. However, their contribution to the...