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» Tradeoffs in transactional memory virtualization
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TC
2010
14 years 6 months ago
Architectures and Execution Models for Hardware/Software Compilation and Their System-Level Realization
We propose an execution model that orchestrates the fine-grained interaction of a conventional general-purpose processor (GPP) and a high-speed reconfigurable hardware accelerator ...
Holger Lange, Andreas Koch
ICFP
2008
ACM
15 years 12 months ago
Transactional events for ML
Transactional events (TE) are an approach to concurrent programming that enriches the first-class synchronous message-passing of Concurrent ML (CML) with a combinator that allows ...
Laura Effinger-Dean, Matthew Kehrt, Dan Grossman
ASPLOS
2008
ACM
15 years 1 months ago
General and efficient locking without blocking
Standard concurrency control mechanisms offer a trade-off: Transactional memory approaches maximize concurrency, but suffer high overheads and cost for retrying in the case of act...
Yannis Smaragdakis, Anthony Kay, Reimer Behrends, ...
ICPP
2009
IEEE
14 years 9 months ago
A Resource Optimized Remote-Memory-Access Architecture for Low-latency Communication
This paper introduces a new highly optimized architecture for remote memory access (RMA). RMA, using put and get operations, is a one-sided communication function which amongst ot...
Mondrian Nüssle, Martin Scherer, Ulrich Br&uu...
ACMMSP
2006
ACM
278views Hardware» more  ACMMSP 2006»
15 years 5 months ago
Atomicity via source-to-source translation
We present an implementation and evaluation of atomicity (also known as software transactions) for a dialect of Java. Our implementation is fundamentally different from prior work...
Benjamin Hindman, Dan Grossman