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CORR
2008
Springer
144views Education» more  CORR 2008»
14 years 9 months ago
Modular Compilation of a Synchronous Language
Synchronous languages rely on formal methods to ease the development of applications in an efficient and reusable way. Formal methods have been advocated as a means of increasing t...
Annie Ressouche, Daniel Gaffé, Valér...
ATVA
2006
Springer
114views Hardware» more  ATVA 2006»
15 years 1 months ago
Selective Approaches for Solving Weak Games
Abstract. Model-checking alternating-time properties has recently attracted much interest in the verification of distributed protocols. While checking the validity of a specificati...
Malte Helmert, Robert Mattmüller, Sven Schewe
ESORICS
2002
Springer
15 years 9 months ago
Formal Security Analysis with Interacting State Machines
We introduce the ISM approach, a framework for modeling and verifying reactive systems in a formal, even machine-checked, way. The framework has been developed for applications in ...
David von Oheimb, Volkmar Lotz
ACSD
2003
IEEE
103views Hardware» more  ACSD 2003»
15 years 2 months ago
Design Validation of ZCSP with SPIN
— We consider the problem of specifying a model of the Zero Copy Secured Protocol for the purpose of LTL verification with the SPIN Model Checker. ZCSP is based on Direct Memory...
Vincent Beaudenon, Emmanuelle Encrenaz, Jean Lou D...
ISSS
2002
IEEE
127views Hardware» more  ISSS 2002»
15 years 2 months ago
Validation in a Component-Based Design Flow for Multicore SoCs
Currently, since many SoCs include heterogeneous components such as CPUs, DSPs, ASICs, memories, buses, etc., system integration becomes a major step in the design flow. To enable...
Ahmed Amine Jerraya, Sungjoo Yoo, Aimen Bouchhima,...