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ECMDAFA
2005
Springer
130views Hardware» more  ECMDAFA 2005»
15 years 3 months ago
Control Flow Analysis of UML 2.0 Sequence Diagrams
This article presents a control flow analysis methodology based on UML 2.0 sequence diagrams (SD). In contrast to the conventional code-based control flow analysis techniques, thi...
Vahid Garousi, Lionel C. Briand, Yvan Labiche
CAV
2003
Springer
188views Hardware» more  CAV 2003»
15 years 1 months ago
Thread-Modular Abstraction Refinement
odular Abstraction Refinement Thomas A. Henzinger1 , Ranjit Jhala1 , Rupak Majumdar1 , and Shaz Qadeer2 1 University of California, Berkeley 2 Microsoft Research, Redmond Abstract....
Thomas A. Henzinger, Ranjit Jhala, Rupak Majumdar,...
HPCA
2011
IEEE
14 years 1 months ago
MOPED: Orchestrating interprocess message data on CMPs
Future CMPs will combine many simple cores with deep cache hierarchies. With more cores, cache resources per core are fewer, and must be shared carefully to avoid poor utilization...
Junli Gu, Steven S. Lumetta, Rakesh Kumar, Yihe Su...
FMCAD
2009
Springer
15 years 1 months ago
Industrial strength refinement checking
This paper discusses a methodology used on an industrial hardware development project to validate various cache-coherence protocol components. The idea is to use a high level model...
Jesse D. Bingham, John Erickson, Gaurav Singh, Fle...
JSAC
2011
115views more  JSAC 2011»
14 years 4 months ago
Scalable Cross-Layer Wireless Access Control Using Multi-Carrier Burst Contention
Abstract—The increasing demand for wireless access in vehicular environments (WAVE) supporting a wide range of applications such as traffic safety, surveying, infotainment etc.,...
Bogdan Roman, Ian J. Wassell, Ioannis Chatzigeorgi...