914 search results - page 4 / 183 » Transaction-Level Modeling for Sensor Networks Using SystemC |
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ISCAS
2005
IEEE
15 years 3 months ago
2005
IEEE
—Systems on chip are more and more heterogeneous and include software, analog/RF and digital hardware, and non-electronic components such as sensors or actuators. The design and ...
CASES
2006
ACM
15 years 3 months ago
2006
ACM
Designers of SoCs with non-digital components, such as analog or MEMS devices, can currently use high-level system design languages, such as SystemC, to model only the digital par...
105
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FDL
2007
IEEE
15 years 4 months ago
2007
IEEE
Transaction level models (TLMs) can be constructed at t levels of abstraction, denoted as untimed (UT), cycle-approximate (CX), and cycle accurate (CA) in this paper. The choice o...
DSD
2009
IEEE
15 years 4 months ago
2009
IEEE
— In this paper, we present a novel framework for the automated generation of Network-on-Chips (NoC) architectures, that enables architecture exploration and optimization. The au...
CODES
2006
IEEE
15 years 3 months ago
2006
IEEE
This paper presents a methodology to combine Transaction Level Modeling and System/Network co-simulation for the design of networked embedded systems. As a result, a new design di...