434 search results - page 63 / 87 » Transactional memory for smalltalk |
ASPLOS
2000
ACM
15 years 1 months ago
2000
ACM
This paper describes the architecture and implementation of the AlphaServer GS320, a cache-coherent non-uniform memory access multiprocessor developed at Compaq. The AlphaServer G...
DAC
2008
ACM
15 years 10 months ago
2008
ACM
We present a cross-layer customization methodology for latency and bandwidth efficient inter-core communication in embedded multiprocessors. The methodology integrates compiler, o...
HPCA
2001
IEEE
15 years 9 months ago
2001
IEEE
The use of the Java programming language for implementing server-side application logic is increasing in popularity, yet there is very little known about the architectural require...
COLCOM
2007
IEEE
15 years 3 months ago
2007
IEEE
—In many applications, transaction data arrive in the form of high speed data streams. These data contain a lot of information about customers that needs to be carefully managed ...
IEEEPACT
2005
IEEE
15 years 3 months ago
2005
IEEE
Transactional Coherence and Consistency (TCC) is a novel coherence scheme for shared memory multiprocessors that uses programmer-defined transactions as the fundamental unit of p...