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PPOPP
2009
ACM
14 years 6 months ago
Transactional memory with strong atomicity using off-the-shelf memory protection hardware
This paper introduces a new way to provide strong atomicity in an implementation of transactional memory. Strong atomicity lets us offer clear semantics to programs, even if they ...
Martín Abadi, Tim Harris, Mojtaba Mehrara
ISCA
2008
IEEE
165views Hardware» more  ISCA 2008»
13 years 12 months ago
Using Hardware Memory Protection to Build a High-Performance, Strongly-Atomic Hybrid Transactional Memory
We demonstrate how fine-grained memory protection can be used in support of transactional memory systems: first showing how a software transactional memory system (STM) can be m...
Lee Baugh, Naveen Neelakantam, Craig B. Zilles
WDAG
2010
Springer
216views Algorithms» more  WDAG 2010»
13 years 3 months ago
A Scalable Lock-Free Universal Construction with Best Effort Transactional Hardware
The imminent arrival of best-effort transactional hardware has spurred new interest in the construction of nonblocking data structures, such as those that require atomic updates to...
Francois Carouge, Michael F. Spear
PLDI
2009
ACM
14 years 7 days ago
Parallelizing sequential applications on commodity hardware using a low-cost software transactional memory
Multicore designs have emerged as the mainstream design paradigm for the microprocessor industry. Unfortunately, providing multiple cores does not directly translate into performa...
Mojtaba Mehrara, Jeff Hao, Po-Chun Hsu, Scott A. M...
ACMMSP
2006
ACM
250views Hardware» more  ACMMSP 2006»
13 years 11 months ago
What do high-level memory models mean for transactions?
Many people have proposed adding transactions, or atomic blocks, to type-safe high-level programming languages. However, researchers have not considered the semantics of transacti...
Dan Grossman, Jeremy Manson, William Pugh