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ISCAS
2002
IEEE
124views Hardware» more  ISCAS 2002»
15 years 10 months ago
Performance optimization of multiple memory architectures for DSP
Multiple memory module architecture offers higher performance by providing potentially doubled memory bandwidth. Two key problems in gaining high performance in this kind of archi...
Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha
UM
2009
Springer
16 years 13 days ago
Performance Evaluation of a Privacy-Enhancing Framework for Personalized Websites
Abstract. Reconciling personalization with privacy has been a continuing interest in the user modeling community. In prior work, we proposed a dynamic privacy-enhancing user modeli...
Yang Wang 0005, Alfred Kobsa
INDOCRYPT
2004
Springer
15 years 11 months ago
The Security and Performance of the Galois/Counter Mode (GCM) of Operation
Abstract. The recently introduced Galois/Counter Mode (GCM) of operation for block ciphers provides both encryption and message authentication, using universal hashing based on mul...
David A. McGrew, John Viega
TCAD
2010
105views more  TCAD 2010»
15 years 19 days ago
Fault Tolerant Network on Chip Switching With Graceful Performance Degradation
The structural redundancy inherent to on-chip interconnection networks [networks on chip (NoC)] can be exploited by adaptive routing algorithms in order to provide connectivity eve...
Adán Kohler, Gert Schley, Martin Radetzki
BMCBI
2010
118views more  BMCBI 2010»
15 years 6 months ago
Predicting nucleosome positioning using a duration Hidden Markov Model
Background: The nucleosome is the fundamental packing unit of DNAs in eukaryotic cells. Its detailed positioning on the genome is closely related to chromosome functions. Increasi...
Liqun Xi, Yvonne Fondufe-Mittendorf, Lei Xia, Jare...