: While the conventional remote method invocation mechanism has been considered for a long time as the primary approach for facilitating interactions among real-time objects, a mul...
K. H. (Kane) Kim, Yuqing Li, Sheng Liu, Moon-hae K...
Originally, the hierarchical coding structure was proposed to achieve temporal scalability. Soon after, it was realized that with a proper quantization parameter cascading (QPC) s...
This paper proposes the use of empirical modeling techniques for building microarchitecture sensitive models for compiler optimizations. The models we build relate program perform...
Kapil Vaswani, Matthew J. Thazhuthaveetil, Y. N. S...
Modern chip-level multiprocessors (CMPs) contain multiple processor cores sharing a common last-level cache, memory interconnects, and other hardware resources. Workloads running ...
Richard West, Puneet Zaroo, Carl A. Waldspurger, X...
Abstract. Hardware realization of kernel loops holds the promise of accelerating the overall application performance and is therefore an important part of the synthesis process. In...