10 search results - page 2 / 2 » Transformed pseudo-random patterns for BIST |
ICCAD
1996
IEEE
15 years 3 months ago
1996
IEEE
A scan-based BIST scheme is presented which guarantees complete fault coverage with very low hardware overhead. A probabilistic analysis shows that the output of an LFSR which fee...
VTS
1995
IEEE
15 years 3 months ago
1995
IEEE
This paper presents a new approach for on-chip test pattern generation. The set of test patterns generated by a pseudo-random pattern generator (e.g., an LFSR) is transformed into...
103
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VLSID
2001
IEEE
15 years 12 months ago
2001
IEEE
In this paper, we propose a new transparent built-in self-test ( TBIST ) method to test multiple embedded memory arrays with various sizes in parallel. First, a new transparent tes...
82
Voted
DDECS
2006
IEEE
15 years 5 months ago
2006
IEEE
- Extension of a BIST design algorithm is proposed in this paper. The method is based on a synthesis of a combinational block - the decoder, transforming pseudo-random code words i...
127
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ATS
1998
IEEE
15 years 3 months ago
1998
IEEE
This paper presents a new effective Built-In Self Test (BIST) scheme that achieves 100% fault coverage with low area overhead, and without any modification of the circuit under tes...