1640 search results - page 112 / 328 » Transistor-Level Timing Analysis Using Embedded Simulation |
141
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IEEECIT
2010
IEEE
15 years 7 days ago
2010
IEEE
Face recognition has great demands in human recognition and recently it becomes one of the most important research areas of biometrics. In this paper, we present a novel layered fa...
123
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STOC
1998
ACM
15 years 7 months ago
1998
ACM
In [6], Gallager introduces a family of codes based on sparse bipartite graphs, which he calls low-density parity-check codes. He suggests a natural decoding algorithm for these c...
125
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CODES
2006
IEEE
15 years 6 months ago
2006
IEEE
Simulating chip-multiprocessor systems (CMP) can take a long time. For single-threaded workloads, earlier work has shown the utility of phase analysis, that is identification of r...
103
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ICFEM
2007
Springer
15 years 9 months ago
2007
Springer
Simulink is popular in industry for modeling and simulating embedded systems. It is deficient to handle requirements of high-level assurance and timing analysis. Previously, we sh...
148
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EMSOFT
2009
Springer
15 years 9 months ago
2009
Springer
System-on-Chip (SoC) is a promising paradigm to implement safety-critical embedded systems, but it poses significant challenges from a design and verification point of view. In ...