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» Transistor-Level Timing Analysis Using Embedded Simulation
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SIMUTOOLS
2008
15 years 4 months ago
Simulation of ad hoc networks: ns-2 compared to JiST/SWANS
For the evaluation of ad hoc network protocols, researchers traditionally use simulations because they easily allow for a large number of nodes and reproducible environment condit...
Elmar Schoch, Michael Feiri, Frank Kargl, Michael ...
108
Voted
ICC
2008
IEEE
135views Communications» more  ICC 2008»
15 years 9 months ago
Data-Aided Joint Estimation of Carrier Frequency Offset and Frequency-Selective Time-Varying Channel
—The issue of data-aided joint carrier frequency offset (CFO) and channel estimation is investigated in the presence of a rapidly time-varying frequency-selective channel. We der...
Nathan Ricklin, James R. Zeidler
ICC
2009
IEEE
135views Communications» more  ICC 2009»
15 years 9 months ago
Block Detection of Multiple Symbol DPSK in a Statistically Unknown Time-Varying Channel
—We present a detection scheme for multiple-symbol DPSK for use in a statistically unknown time-varying channel. The scheme relies on a parametric representation of the timevaryi...
Nathan Ricklin, James R. Zeidler
GECCO
2000
Springer
101views Optimization» more  GECCO 2000»
15 years 6 months ago
Polynomial Time Summary Statistics for Two general Classes of Functions
In previous work we showed, by Walsh analysis, that summary statistics such as mean, variance, skew, and higher order statistics can be computed in polynomial time for embedded la...
Robert B. Heckendorn
ACSD
2006
IEEE
105views Hardware» more  ACSD 2006»
15 years 9 months ago
Throughput Analysis of Synchronous Data Flow Graphs
Synchronous Data Flow Graphs (SDFGs) are a useful tool for modeling and analyzing embedded data flow applications, both in a single processor and a multiprocessing context or for...
Amir Hossein Ghamarian, Marc Geilen, Sander Stuijk...