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» Transistor-Level Timing Analysis Using Embedded Simulation
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HPCA
2003
IEEE
16 years 3 months ago
A Statistically Rigorous Approach for Improving Simulation Methodology
Due to cost, time, and flexibility constraints, simulators are often used to explore the design space when developing a new processor architecture, as well as when evaluating the ...
Joshua J. Yi, David J. Lilja, Douglas M. Hawkins
DAGSTUHL
1997
15 years 4 months ago
Spotting Structure in Complex Time Dependent Flow
Analyzing structure in complex time dependent flow fields is a challenging problem. This paper describes the use of spot noise for the visualization of this type of fields. Spo...
Wim C. de Leeuw, Robert van Liere
ICCAD
2002
IEEE
108views Hardware» more  ICCAD 2002»
16 years 1 hour ago
A precorrected-FFT method for simulating on-chip inductance
The simulation of on-chip inductance using PEEC-based circuit analysis methods often requires the solution of a subproblem where an extracted inductance matrix must be multiplied ...
Haitian Hu, David Blaauw, Vladimir Zolotov, Kaushi...
TOG
2002
162views more  TOG 2002»
15 years 2 months ago
Interactive skeleton-driven dynamic deformations
This paper presents a framework for the skeleton-driven animation of elastically deformable characters. A character is embedded in a coarse volumetric control lattice, which provi...
Steve Capell, Seth Green, Brian Curless, Tom Ducha...
IPPS
2006
IEEE
15 years 9 months ago
Instability in parallel job scheduling simulation: the role of workload flurries
The performance of computer systems depends, among other things, on the workload. This motivates the use of real workloads (as recorded in activity logs) to drive simulations of n...
Dan Tsafrir, Dror G. Feitelson