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» Transistor-Level Timing Analysis Using Embedded Simulation
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141
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RTCSA
2009
IEEE
15 years 10 months ago
Bounding the Maximum Length of Non-preemptive Regions under Fixed Priority Scheduling
The question whether preemptive systems are better than non-preemptive systems has been debated for a long time, but only partial answers have been provided in the real-time liter...
Gang Yao, Giorgio C. Buttazzo, Marko Bertogna
DIGRA
2005
Springer
15 years 8 months ago
Liberal Sims?: Simulated Difference and the Commodity of Social Diversity
This paper outlines how representations of gender, sexuality, race and ethnicity intersect with strategies of late capitalism in The Sims, arguably the most popular video game of ...
A. Brady Curlew
134
Voted
VISUALIZATION
2005
IEEE
15 years 9 months ago
Visual Analysis and Exploration of Fluid Flow in a Cooling Jacket
We present a visual analysis and exploration of fluid flow through a cooling jacket. Engineers invest a large amount of time and serious effort to optimize the flow through thi...
Robert S. Laramee, Christoph Garth, Helmut Doleisc...
ICNP
2003
IEEE
15 years 8 months ago
Delay Analysis of IEEE 802.11 in Single-Hop Networks
This paper presents an analytical model to compute the average service time and jitter experienced by a packet when transmitted in a saturated IEEE 802.11 ad hoc network. In contr...
Marcelo M. Carvalho, J. J. Garcia-Luna-Aceves
100
Voted
DAC
2003
ACM
16 years 4 months ago
Automatic trace analysis for logic of constraints
Verification of system designs continues to be a major challenge today. Simulation remains the primary tool for making sure that implementations perform as they should. We present...
Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Wat...