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» Transistor-Level Timing Analysis Using Embedded Simulation
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TC
2010
15 years 1 months ago
Design and Analysis of On-Chip Networks for Large-Scale Cache Systems
—Switched networks have been adopted in on-chip communication for their scalability and efficient resource sharing. However, using a general network for a specific domain may res...
Yuho Jin, Eun Jung Kim, Ki Hwan Yum
GIS
2009
ACM
15 years 8 months ago
Conceptualization of place via spatial clustering and co-occurrence analysis
More and more users are contributing and sharing more and more contents on the Web via the use of content hosting sites and social media services. These user–generated contents ...
Dong-Po Deng, Tyng-Ruey Chuang, Rob Lemmens
LCTRTS
2005
Springer
15 years 9 months ago
Preventing interrupt overload
Performance guarantees can be given to tasks in an embedded system by ensuring that access to each shared resource is mediated by an appropriate scheduler. However, almost all pre...
John Regehr, Usit Duongsaa
DAC
2006
ACM
16 years 4 months ago
Statistical timing based on incomplete probabilistic descriptions of parameter uncertainty
Existing approaches to timing analysis under uncertainty are based on restrictive assumptions. Statistical STA techniques assume that the full probabilistic distribution of parame...
Wei-Shen Wang, Vladik Kreinovich, Michael Orshansk...
SC
2005
ACM
15 years 9 months ago
Bridging the Macro and Micro: A Computing Intensive Earthquake Study Using Discovery Net
We present the development and use of a novel distributed geohazard modeling environment for the analysis and interpretation of large scale earthquake data sets. Our work demonstr...
Yike Guo, Jian Guo Liu, Moustafa Ghanem, Kyran Mis...