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» Transistor-Level Timing Analysis Using Embedded Simulation
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DAC
2004
ACM
16 years 19 days ago
Abstraction of assembler programs for symbolic worst case execution time analysis
ion of Assembler Programs for Symbolic Worst Case Execution Time Analysis Tobias Schuele Tobias.Schuele@informatik.uni-kl.de Klaus Schneider Klaus.Schneider@informatik.uni-kl.de Re...
Klaus Schneider, Tobias Schüle
DATE
2006
IEEE
125views Hardware» more  DATE 2006»
15 years 5 months ago
Combining simulation and formal methods for system-level performance analysis
Recent research on performance analysis for embedded systems shows a trend to formal compositional models and methods. These compositional methods can be used to determine the per...
Simon Künzli, Francesco Poletti, Luca Benini,...
CASES
2010
ACM
14 years 9 months ago
A comprehensive analysis of performance and side-channel-leakage of AES SBOX implementations in embedded software
The Advanced Encryption Standard is used in almost every new embedded application that needs a symmetric-key cipher. In such embedded applications, high-performance as well as res...
Ambuj Sinha, Zhimin Chen, Patrick Schaumont
91
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FDL
2005
IEEE
15 years 5 months ago
Incorporating SystemC in Analog/Mixed-Signal Design Flow
In today’s flows, there is still a gap between system level description and hardware implementation, especially for analog/RF building blocks. SystemC-AMS or co-simulations have...
Patrick Birrer, Walter Hartong
PATMOS
2000
Springer
15 years 3 months ago
Data-Reuse and Parallel Embedded Architectures for Low-Power, Real-Time Multimedia Applications
Exploitation of data re-use in combination with the use of custom memory hierarchy that exploits the temporal locality of data accesses may introduce significant power savings, esp...
Dimitrios Soudris, Nikolaos D. Zervas, Antonios Ar...