1640 search results - page 187 / 328 » Transistor-Level Timing Analysis Using Embedded Simulation |
161
click to vote
TCAD
2008
15 years 3 months ago
2008
Three-dimensional integration has the potential to improve the communication latency and integration density of chip-level multiprocessors (CMPs). However, the stacked highpower de...
121
click to vote
INFOCOM
2006
IEEE
15 years 9 months ago
2006
IEEE
— Polymorphic worms can change their byte sequence as they replicate and propagate, thwarting the traditional signature analysis techniques used by many intrusion detection syste...
126
click to vote
TOG
2002
15 years 2 months ago
2002
A new method for the visualization of two-dimensional fluid flow is presented. The method is based on the advection and decay of dye. These processes are simulated by defining eac...
141
click to vote
EXPCS
2007
15 years 7 months ago
2007
Simulation has been the de facto standard method for performance evaluation of newly proposed ideas in computer architecture for many years. While simulation allows for theoretica...
140
click to vote
EVOW
2008
Springer
15 years 5 months ago
2008
Springer
Traditional test generation methodologies for peripheral cores are performed by a skilled test engineer, leading to long generation times. In this paper a test generation methodolo...