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» Transistor-Level Timing Analysis Using Embedded Simulation
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AIED
2005
Springer
15 years 8 months ago
Teaching about Dynamic Processes A Teachable Agents Approach
This paper discusses the extensions that we have made to Betty’s Brain teachable agent system to help students learn about dynamic processes in a river ecosystem. Students first ...
Ruchi Gupta, Yanna Wu, Gautam Biswas
ICCAD
2006
IEEE
165views Hardware» more  ICCAD 2006»
16 years 12 hour ago
A fast block structure preserving model order reduction for inverse inductance circuits
Most existing RCL−1 circuit reductions stamp inverse inductance L−1 elements by a second-order nodal analysis (NA). The NA formulation uses nodal voltage variables and describ...
Hao Yu, Yiyu Shi, Lei He, David Smart
RTCSA
1995
IEEE
15 years 6 months ago
A timeliness-guaranteed kernel model-DREAM kernel-and implementation techniques
: An essential building-block for construction of future real-time computer systems (RTCS’s) is a timeliness-guaranteed operating system. The first co-author recently formulated ...
K. H. (Kane) Kim, Luiz F. Bacellar, Yuseok Kim, Ch...
DATE
2011
IEEE
223views Hardware» more  DATE 2011»
14 years 6 months ago
Towards a Time-predictable Dual-Issue Microprocessor: The Patmos Approach
Current processors are optimized for average case performance, often leading to a high worst-case execution time (WCET). Many architectural features that increase the average case...
Martin Schoeberl, Pascal Schleuniger, Wolfgang Puf...
ICRA
2005
IEEE
184views Robotics» more  ICRA 2005»
15 years 8 months ago
3D Virtual Prototyping of Home Service Robots Using ASADAL/OBJ
– Typical robot development requires that hardware be mostly functional before significant software development begins. Utilizing virtual prototype of hardware and its environmen...
Kyo Chul Kang, Moonzoo Kim, Jaejoon Lee, Byungkil ...