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» Transistor-Level Timing Analysis Using Embedded Simulation
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CASES
2006
ACM
15 years 8 months ago
High-level languages for small devices: a case study
In this paper we study, through a concrete case, the feasibility of using a high-level, general-purpose logic language in the design and implementation of applications targeting w...
Manuel Carro, José F. Morales, Henk L. Mull...
COCOON
2001
Springer
15 years 7 months ago
PC-Trees vs. PQ-Trees
A data structure called PC-tree is introduced as a generalization of PQ-trees. PC-trees were originally introduced in a planarity test of Shih and Hsu [7] where they represent par...
Wen-Lian Hsu
157
Voted
ECRTS
2005
IEEE
15 years 8 months ago
Cache Contents Selection for Statically-Locked Instruction Caches: An Algorithm Comparison
Cache memories have been extensively used to bridge the gap between high speed processors and relatively slower main memories. However, they are sources of predictability problems...
Antonio Martí Campoy, Isabelle Puaut, Angel...
118
Voted
TCS
2008
15 years 2 months ago
Computational self-assembly
The object of this paper is to appreciate the computational limits inherent in the combinatorics of an applied concurrent (aka agent-based) language . That language is primarily m...
Pierre-Louis Curien, Vincent Danos, Jean Krivine, ...
ESORICS
2007
Springer
15 years 6 months ago
Countering Statistical Disclosure with Receiver-Bound Cover Traffic
Anonymous communications provides an important privacy service by keeping passive eavesdroppers from linking communicating parties. However, using long-term statistical analysis of...
Nayantara Mallesh, Matthew Wright